Xilinx V2.1 - Manual (Page 44)

44 Xilinx Development System
Xilinx System Generator v2.1 Reference Guide
The following waveform illustrates the block’s behavior:
Figure 3-18: Example of Serial to Parallel behavior
This example illustrates the case where the input width is 1, output width is 4, word
size is 1 bit, and the block is configured for most significant word first.
Block Interface
The Serial to Parallel block has one input and one output port. The input port can be
any size. The output port size is indicated on the block parameters dialog box.
Block Parameters Dialog Box
Figure 3-19: Serial to Parallel block parameters dialog box
Parameters specific to the block are:
•
Input Order : Most Significant Word First or Least Significant Word First
•
Output Arithmetic Type : Unsigned or Signed
•
Number of Input Bits : Input width. Must match size of input port.
•
Number of Output Bits : Output width which must be a multiple of the
number of input bits.