Xilinx LogiCore PCI v3.0 - Manual (Page 7)

PCI v3.0.151 Getting Started Guide www.xilinx.com 7
UG157 August 31, 2005
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Preface
About This Guide
The PCI Getting Started Guide provides information about the LogiCORE™ Peripheral
Component Interconnect (PCI) interface, which provides a fully verified, pre-implemented
PCI bus interface available in both 32-bit and 64-bit versions.
This guide discusses the supported design flows for 32-bit and 64-bit PCI interfaces based
on the Virtex™ and Spartan™ architectures, and provides an example design in both
Verilog-HDL and VHDL.
Guide Contents
This manual contains the following chapters:
•
Chapter 1, “Getting Started” describes the core and related information, including
additional resources, technical support, and submitting feedback to Xilinx.
•
Chapter 2, “Installing and Licensing the Core” provides information about installing
and licensing the core.
•
Chapter 3, “Family Specific Considerations” provides information about design
considerations specific to the PCI interface targeting Virtex and Spartan devices.
•
Chapter 4, “Functional Simulation” describes how to simulate the example design
using the supported functional simulation tools, including Cadence NC-Verilog v5.0
and Model Technology ModelSim v5.7b.
•
Chapter 5, “Synthesizing a Design” how to synthesize the example design using the
supported synthesis tools, including Synplicity Synplify v7.3, Exemplar
LeonardoSpectrum v2003a, and Xilinx XST.
•
Chapter 6, “Implementing a Design” describes how to implement the example design
using the supported FPGA implementation tools included with the ISE Foundation
v7.1i software.
•
Chapter 7, “Timing Simulation” describes how to perform timing simulation using
the supported post-route timing simulation tools, including Cadence NC-Verilog v5.0
and Model Technology ModelSim v5.7b.