Rainbow Electronics ATmega8515L - Manual (Page 197)

197
ATmega8515(L)
2512A–AVR–04/02
SPI Timing
Characteristics See Figure 87 and Figure 88 for details.
Figure 87. SPI Interface Timing Requirements (Master Mode)
Table 98. SPI Timing Parameters
Description Mode Min Typ Max
1 SCK period Master See Table 58
ns
2 SCK high/low Master 50% duty cycle
3 Rise/Fall time Master TBD
4 Setup Master 10
5 Hold Master 10
6 Out to SCK Master 0.5 • t
SCK
7 SCK to out Master 10
8 SCK to out high Master 10
9 SS low to out Slave 15
10 SCK period Slave 4 • t
ck
11 SCK high/low Slave 2 • t
ck
12 Rise/Fall time Slave TBD
13 Setup Slave 10
14 Hold Slave 10
15 SCK to out Slave 15
16 SCK to SS high Slave 20
17 SS high to tri-state Slave 10
18 SS low to SCK Salve 2 • t
ck
MOSI
(Data Output)
SCK
(CPOL = 1)
MISO
(Data Input)
SCK
(CPOL = 0)
SS
MSB LSB
LSB MSB
...
...
6 1
2 2
3 4 5
8 7