Document Outline

• 8-bit MCU with CAN controller and Flash
  • 1. Description
  • 2. Features
  • 3. Block Diagram
  • 4. Pin Configuration
    • 4.1. I/O Configurations
    • 4.2. Port Structure
    • 4.3. Read-Modify-Write Instructions
    • 4.4. Quasi-Bidirectional Port Operation
  • 5. SFR Mapping
  • 6. Clock
    • 6.1. Introduction
    • 6.2. Description
    • 6.3. Register
  • 7. Program/Code Memory
    • 7.1. Introduction
    • 7.2. FLASH Memory Architecture
      • 7.2.1. FM0 Memory Architecture
    • 7.3. Overview of FM0 operations
      • 7.3.1. Mapping of the memory space
      • 7.3.2. Launching programming
      • 7.3.3. Status of the flash memory
      • 7.3.4. Selecting FM1/FM1
      • 7.3.5. Loading the Column Latches
      • 7.3.6. Programming the FLASH Spaces
      • 7.3.7. Reading the FLASH Spaces
    • 7.4. Registers
  • 8. Data Memory
    • 8.1. Introduction
    • 8.2. Internal Space
      • 8.2.1. Lower 128 Bytes RAM
      • 8.2.2. Upper 128 Bytes RAM
      • 8.2.3. Expanded RAM
    • 8.3. Dual Data Pointer
      • 8.3.1. Description
      • 8.3.2. Application
    • 8.4. Registers
  • 9. EEPROM data memory
    • 9.1. General description
    • 9.2. Write Data in the column latches
    • 9.3. Programming
    • 9.4. Read Data
    • 9.5. Registers
  • 10. In-System-Programming (ISP)
    • 10.1. Introduction
    • 10.2. Flash Programming and Erasure
      • 10.2.1. Flash Parallel Programming
    • 10.3 Boot Process
      • 10.3.1. Software boot process example
      • 10.3.2. Hardware boot process
    • 10.4. 2 Application-Programming-Interface
    • 10.5. Application remarks
    • 10.6. XROW Bytes
    • 10.7. Hardware Byte
  • 11. Serial I/O Port
    • 11.1. Framing Error Detection
    • 11.2. Automatic Address Recognition
    • 11.3. Given Address
    • 11.4. Broadcast Address
    • 11.5. REGISTERS
  • 12. Timers/Counters
    • 12.1. Introduction
    • 12.2. Timer/Counter Operations
    • 12.3. Timer 0
      • 12.3.1. Mode 0 (13-bit Timer)
      • 12.3.2. Mode 1 (16-bit Timer)
      • 12.3.3. Mode 2 (8-bit Timer with Auto-Reload)
      • 12.3.4. Mode 3 (Two 8-bit Timers)
    • 12.4. Timer 1
      • 12.4.1. Mode 0 (13-bit Timer)
      • 12.4.2. Mode 1 (16-bit Timer)
      • 12.4.3. Mode 2 (8-bit Timer with Auto-Reload)
      • 12.4.4. Mode 3 (Halt)
    • 12.5. Interrupt
    • 12.6. Registers
  • 13. Timer 2
    • 13.1. Introduction
    • 13.2. Auto-Reload Mode
    • 13.3. Programmable Clock-Output
    • 13.4. Registers
  • 14. WatchDog Timer
    • 14.1. Introduction
    • 14.2. WatchDog Programming
    • 14.3. WatchDog Timer during Power down mode and Idle
    • 14.4. Register
  • 15. Atmel CAN Controller
    • 15.1. Introduction
    • 15.2. CAN Controller Description
    • 15.3. CAN Controller Mailbox and Registers Organization
      • 15.3.1. Working on message objects
      • 15.3.2. CAN Controller management
      • 15.3.3. Buffer mode
    • 15.4. IT CAN management
    • 15.5. Bit Timing and BaudRate
    • 15.6. Fault Confinement
    • 15.7. Acceptance filter
    • 15.8. Data and Remote frame
    • 15.9. Time Trigger Communication (TTC) and Message Stamping
    • 15.10. CAN Autobaud and Listening mode
    • 15.11. CAN SFR’s
    • 15.12. Registers
  • 16. Programmable Counter Array PCA
    • 16.1. Introduction
    • 16.2. PCA Interrupt
    • 16.3. PCA Capture Mode
    • 16.4. 16-bit Software Timer Mode
    • 16.5. High Speed Output Mode
    • 16.6. Pulse Width Modulator Mode
    • 16.7. PCA Registers
  • 17. Analog-to-Digital Converter (ADC)
    • 17.1. Introduction
    • 17.2. Features
    • 17.3. ADC Port1 I/O Functions
    • 17.4. ADC Converter Operation
    • 17.5. Voltage Conversion
    • 17.6. Clock Selection
    • 17.7. ADC Standby Mode
    • 17.8. IT ADC management
    • 17.9. Registers
  • 18. Interrupt System
    • 18.1. Introduction
    • 18.2. Registers
  • 19. Electrical Characteristics
    • 19.1. Absolute Maximum Ratings (1)
    • 19.2. DC Parameters for Standard Voltage
    • 19.3. DC Parameters for A/D Converter
    • 19.4. AC Parameters
      • 19.4.1. Explanation of the AC Symbols
      • 19.4.2. Serial Port Timing - Shift Register Mode
      • 19.4.3. Shift Register Timing Waveforms
      • 19.4.4. External Clock Drive Characteristics (XTAL1)
      • 19.4.5. External Clock Drive Waveforms
      • 19.4.6. AC Testing Input/Output Waveforms
      • 19.4.7. Float Waveforms
  • 20. Ordering Information