Rainbow Electronics MAX8649 User Manual
Page 16
MAX8649
1.8A Step-Down Regulator with Differential
Remote Sense in 2mm x 2mm WLP
16
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Thermal-Overload Protection
Thermal-overload protection limits total power dissipa-
tion in the MAX8649. When internal thermal sensors
detect a die temperature in excess of +160°C (typ), the
DC-DC step-down regulator is shut down, allowing the
IC to cool. The DC-DC step-down regulator is turned on
again after the junction cools by 20°C (typ), resulting in
a pulsed output during continuous thermal-overload
conditions.
During thermal overload, the I
2
C interface remains
active and all register values are maintained.
I
2
C Interface
An I
2
C-compatible, 2-wire serial interface controls the
step-down converter output voltage, ramp rate, operat-
ing mode, and synchronization. The serial bus consists
of a bidirectional serial-data line (SDA) and a serial-
clock input (SCL). The master initiates data transfer on
the bus and generates SCL to permit data transfer.
I
2
C is an open-drain bus. SDA and SCL require pullup
resistors (500
Ω or greater). Optional (24Ω) in series
with SDA and SCL protect the device inputs from high-
voltage spikes on the bus lines. Series resistors also
minimize crosstalk and undershoot on bus signals.
Bit Transfer
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse (see Figure 9).
Changes in SDA while SCL is high are control signals
(see the
START and STOP Conditions
section for more
information).
Each transmit sequence is framed by a START (S) con-
dition and a STOP (P) condition. Each data packet is 9
bits long; 8 bits of data followed by the acknowledge
bit. The MAX8649 supports data transfer rates with SCL
frequencies up to 400kHz.
START and STOP Conditions
When the serial interface is inactive, SDA and SCL idle
high. A master device initiates communication by
issuing a START (S) condition. A START condition is a
high-to-low transition on SDA with SCL high. A STOP
(P) condition is a low-to-high transition on SDA, while
SCL is high (Figure 10).
SCL
SDA
DATA LINE STABLE DATA VALID
CHANGE OF DATA ALLOWED
Figure 9. I
2
C Bit Transfer
SDA
SCL
START
CONDITION
STOP
CONDITION
Figure 10. I
2
C START and STOP Conditions