Rainbow Electronics ATmega64M1 - Manual (Page 154)

154
8209A–AVR–08/09
ATmega16M1/32M1/64M1
19. SPI – Serial Peripheral Interface
19.1 Features
• Full-duplex, Three-wire Synchronous Data Transfer
• Master or Slave Operation
• LSB First or MSB First Data Transfer
• Seven Programmable Bit Rates
• End of Transmission Interrupt Flag
• Write Collision Flag Protection
• Wake-up from Idle Mode
• Double Speed (CK/2) Master SPI Mode
19.2 Overview
The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the
ATmega16M1/32M1/64M1 and peripheral devices or between several AVR devices.
Figure 19-1. SPI Block Diagram (1)
Note: 1. Refer to Figure 1-1 on page 2 , and Table 14-3 on page 72 for SPI pin placement.
SPI2X
SPI2X
DIVIDER
/2/4/8/16/32/64/128
clk
IO
MISO
MISO
_A
MOSI
MOSI
_A
SCK
SCK
_A
SS
SS_A
SPIPS