Rainbow Electronics AT45DB011D - Manual (Page 8)

8
3639J–DFLASH–11/2012
AT45DB011D
bytes), the opcode 83H must be clocked into the device followed by three address bytes consist-
ing of seven don’t care bits, nine page address bits (A16 - A8) that specify the page in the main
memory to be written and eight don’t care bits. When a low-to-high transition occurs on the CS
pin, the part will first erase the selected page in main memory (the erased state is a logic 1) and
then program the data stored in the buffer into the specified page in main memory. Both the
erase and the programming of the page are internally self-timed and should take place in a max-
imum time of t
EP
. During this time, the status register will indicate that the part is busy.
7.3 Buffer to Main Memory Page Program without Built-in Erase
A previously-erased page within main memory can be programmed with the contents of the buf-
fer. A 1-byte opcode, 88H, must be clocked into the device. For the DataFlash standard page
size (264-bytes), the opcode must be followed by three address bytes consist of six don’t care
bits, nine page address bits (PA8 - PA0) that specify the page in the main memory to be written
and nine don’t care bits. To perform a buffer to main memory page program without built-in
erase for the binary page size (256-bytes), the opcode 88H must be clocked into the device fol-
lowed by three address bytes consisting of seven don’t care bits, nine page address bits (A16 -
A8) that specify the page in the main memory to be written and eight don’t care bits. When a
low-to-high transition occurs on the CS pin, the part will program the data stored in the buffer
into the specified page in the main memory. It is necessary that the page in main memory that is
being programmed has been previously erased using one of the erase commands (Page Erase
or Block Erase). The programming of the page is internally self-timed and should take place in a
maximum time of t
P
. During this time, the status register will indicate that the part is busy.
7.4 Page Erase
The Page Erase command can be used to individually erase any page in the main memory array
allowing the Buffer to Main Memory Page Program to be utilized at a later time. To perform a
page erase in the DataFlash standard page size (264-bytes), an opcode of 81H must be loaded
into the device, followed by three address bytes comprised of six don’t care bits, nine page
address bits (PA8 - PA0) that specify the page in the main memory to be erased and nine don’t
care bits. To perform a page erase in the binary page size (256-bytes), the opcode 81H must be
loaded into the device, followed by three address bytes consist of seven don’t care bits, nine
page address bits (A16 - A8) that specify the page in the main memory to be erased and 8 don’t
care bits. When a low-to-high transition occurs on the CS pin, the part will erase the selected
page (the erased state is a logical 1). The erase operation is internally self-timed and should
take place in a maximum time of t
PE
. During this time, the status register will indicate that the
part is busy.
7.5 Block Erase
A block of eight pages can be erased at one time. This command is useful when large amounts
of data has to be written into the device. This will avoid using multiple Page Erase Commands.
To perform a block erase for the DataFlash standard page size (264-bytes), an opcode of 50H
must be loaded into the device, followed by three address bytes comprised of six don’t care bits,
six page address bits (PA8 -PA3) and 12 don’t care bits. The six page address bits are used to
specify which block of eight pages is to be erased. To perform a block erase for the binary page
size (256-bytes), the opcode 50H must be loaded into the device, followed by three address
bytes consisting of seven don’t care bits, six page address bits (A16 - A11) and 11 don’t care
bits. The six page address bits are used to specify which block of eight pages is to be erased.
When a low-to-high transition occurs on the CS pin, the part will erase the selected block of eight
pages. The erase operation is internally self-timed and should take place in a maximum time of
t
BE
. During this time, the status register will indicate that the part is busy.