Rainbow Electronics AT25DL161 - Manual (Page 6)

6 AT25DL161 [DATASHEET]
8795E–DFLASH–12/2012
4. Memory Array
To provide the greatest flexibility, the AT25DL161 memory array can be erased in four levels of granularity, including a
full Chip Erase. In addition, the array has been divided into physical sectors of uniform size, which can be individually
protected from program and erase operations. The size of the physical sectors is optimized for both code and data
storage applications, allowing both code and data segments to reside in their own isolated regions. The memory
architecture diagram illustrates the breakdown of each erase level, as well as the breakdown of each physical sector.
Figure 4-1. Memory Architecture Diagram
1-256 byte
Page Program
(02h Command)
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes
256 bytes