4 status register read – Rainbow Electronics AT45DB021D User Manual
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3638K–DFLASH–11/2012
AT45DB021D
Main Memory Page Program with Built-in Erase. A page of data is first transferred from the main memory to the
buffer and then the same data (from the buffer) is programmed back into its original page of main memory. To start
the rewrite operation for the DataFlash standard page size (264-bytes), a 1-byte opcode, 58H, must be clocked into
the device, followed by three address bytes comprised of five don’t care bits, 10 page address bits (PA9-PA0) that
specify the page in main memory to be rewritten and nine don’t care bits. To initiate an auto page rewrite for a
binary page size (256-bytes), the opcode 58H must be clocked into the device followed by three address bytes
consisting of six don’t care bits, 10 page address bits (A17 - A8) that specify the page in the main memory that is to
be written and eight don’t care bits. When a low-to-high transition occurs on the CS pin, the part will first transfer
data from the page in main memory to a buffer and then program the data from the buffer back into same page of
main memory. The operation is internally self-timed and should take place in a maximum time of t
EP
. During this
time, the status register indicate that the part is busy.
If a sector is programmed or reprogrammed sequentially page by page, then the programming algorithm shown in
(
) is recommended. Otherwise, if multiple bytes in a page or several pages are programmed
randomly in a sector, then the programming algorithm shown in
(
) is recommended. Each
page within a sector must be updated/rewritten at least once within every 20,000 cumulative page erase/program
operations in that sector. Please contact Adesto for availability of devices that are specified to exceed the 20K
cycle cumulative limit.
9.4
Status Register Read
The status register can be used to determine the device’s ready/busy status, page size, a Main Memory Page to
Buffer Compare operation result, the Sector Protection status or the device density. The Status Register can be
read at any time, including during an internally self-timed program or erase operation. To read the status register,
the CS pin must be asserted and the opcode of D7H must be loaded into the device. After the opcode is clocked in,
the 1-byte status register will be clocked out on the output pin (SO), starting with the next clock cycle. The data in
the status register, starting with the MSB (bit seven), will be clocked out on the SO pin during the next eight clock
cycles. After the one byte of the status register has been clocked out, the sequence will repeat itself (as long as CS
remains low and SCK is being toggled). The data in the status register is constantly updated, so each repeating
sequence will output new data.
Ready/busy status is indicated using bit seven of the status register. If bit seven is a one, then the device is not
busy and is ready to accept the next command. If bit seven is a zero, then the device is in a busy state. Since the
data in the status register is constantly updated, the user must toggle SCK pin to check the ready/busy status.
There are several operations that can cause the device to be in a busy state: Main Memory Page to Buffer
Transfer, Main Memory Page to Buffer Compare, Buffer to Main Memory Page Program, Main Memory Page
Program through Buffer, Page Erase, Block Erase, Sector Erase, Chip Erase and Auto Page Rewrite.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated using bit six of the
status register. If bit six is a zero, then the data in the main memory page matches the data in the buffer. If bit six is
a one, then at least one bit of the data in the main memory page does not match the data in the buffer.
Bit one in the Status Register is used to provide information to the user whether or not the sector protection has
been enabled or disabled, either by software-controlled method or hardware-controlled method. A logic 1 indicates
that sector protection has been enabled and logic 0 indicates that sector protection has been disabled.
Bit zero in the Status Register indicates whether the page size of the main memory array is configured for “power
of 2” binary page size (256-bytes) or the DataFlash standard page size (264-bytes). If bit zero is a one, then the
page size is set to 256-bytes. If bit zero is a zero, then the page size is set to 264-bytes.
The device density is indicated using bits five, four, three, and two of the status register. For AT45DB021D, the four
bits are 0101 The decimal value of these four binary bits does not equate to the device density; the four bits
represent a combinational code relating to differing densities of DataFlash devices. The device density is not the
same as the density code indicated in the JEDEC device ID information. The device density is provided only for
backward compatibility.