Rainbow Electronics DS33M33 - Manual (Page 12)

___________________________________________________ DS33M30/M31/M33 ABRIDGED DATA SHEET
Rev: 111908 12 of 20
1.4 PDH (DS33M31 and DS33M33 Only)
There are two sets of DS3/E3 framer/formatters. Each set supports three independent DS3/E3 data streams (or
ports). The set interfaces directly to the Async DS3/E3 mapper called Add/Drop Framer/Formatter. The set
interfaces with external T3/E3 facilities are called Line Framer/Formatter The Add/Drop Framers reside in both the
DS33M31 and DS33M33 and are used for path monitoring the desynchronized DS3/E3 and test origination of the
PDH signals. The Line Framers, supported only in DS33M33, are used for path monitoring the received signals
from external facilities.
1.4.1 Add/Drop DS3/E3 Framer/Formatter (DS33M31 and DS33M33 only)
1.4.1.1 Drop DS3/E3 Framer
• Incorporation of drop DS3/E3 framers on a per port basis for far-end alarm detection and performance
monitor of DS3/E3 signals that are demapped from SONET/SDH STS-12/STM-4
• Frame synchronization for M23 DS3, C-bit Parity DS3, G.751 E3, and G.832 E3
• Detection of DS3 loss of frame (LOF), out of frame (OOF), out of multiframe (OOMF), severely error frame
(SEF), change of frame alignment (COFA), remote defect indication (RDI), alarm indication signal (AIS),
receive unframed all ones, idle signal, DS3 application ID bit, and DS3 format mismatch
• Detection of G.751 E3 LOF, OOF, COFA, remote alarm indication (RAI), and AIS
• Detection of G.832 E3 LOF, OOF, COFA, RDI, and AIS
• Detection and accumulation of F-bit errors, M-bit errors, FAS errors, FA1 and FA2 byte errors, OOF
occurrences, P-bit parity errors, C-bit parity errors, BIP-8 (bit or block basis) errors, far end block errors
(FEBE), and remote error indications (REI)
• Fully programmable automatic AIS insertion upon detection of OOF and/or AIS
• All DS3/E3 overhead fields are presented on the associated receive DS3/E3 overhead output port
• Extraction of HDLC data stream from DS3 path maintenance data link (PMDL), G.751 E3 national bit, or
G.832 E3 NR or GC bytes
• Extraction of trail trace access point identifier from G.832 E3 TR byte
1.4.1.2 Add DS3/E3 Formatter (Optional)
• Insertion of all overhead for M23 DS3, C-bit parity DS3, G.751 E3, and G.832 E3
• Manual generation of AIS and DS3 idle signals
• Automatic or manual generation of RDI/RAI and FEBE/REI
• Programmable error insertion of framing errors, parity errors, and FEBE/REI errors
• All DS3/E3 overhead fields can be sourced from the external transmit DS3/E3 overhead input port
• Insertion of HDLC data stream into DS3 path maintenance data link (PMDL), G.751 E3 national bit, or
G.832 E3 NR or GC bytes
• Insertion of trail trace access point identifier into G.832 E3 TR byte
• M23 DS3 C-bits programmable as payload or overhead
• Formatter pass-through mode with programmable DS3 P-bit correction for DS3/E3 line terminating
equipment (LTE) applications
1.4.1.3 HDLC Controller
• Two controllers per port for DS3 path maintenance data link (PMDL), G.751 national bit (Sn), G.832
NR/GC, or STS-1 DCCs (D1-D3 and/or D4-12), or STS-1/VC-3 path user channel (F1 or F2)
• A controller for each optional VC-4 path user channels (F2)
• 256-byte receive and transmit FIFOs
• Handles all of the normal Layer 2 tasks including zero stuffing/destuffing, FCS generation/checking, abort
generation/checking, flag generation/detection, and byte alignment
• Programmable high and low water marks for the transmit and receive FIFOs
• Rx data is forced to all ones during LOS, LOF, and AIS detection to eliminate false packets