2 tdm feature overview, Tdm f, Eature – Rainbow Electronics DS33M33 User Manual

Page 6: Verview, Figure 1-1 tdm functional blocks

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___________________________________________________ DS33M30/M31/M33 ABRIDGED DATA SHEET

Rev: 111908

6 of 20

• Manual or automatic one-second update of performance monitoring counters

• Single reference clock for all data rates using internal clock rate adapter (CLAD)

• Detection of loss of transmit clock and loss of receive clock

• Supports two packages:

• 10mm, 144-pin CSBGA Package (DS33M30)

• 17mm, 256-pin CSBGA Package (DS33M31/DS33M33)

• 1.8V, 2.5V, 3.3V supplies

• IEEE 1149.1 JTAG boundary scan

• Software access to device ID and silicon revision

• Development support includes evaluation kit, driver source code, and reference designs

1.2 TDM

Feature

Overview

Figure 1-1

describes the TDM side feature.

Figure 1-1. TDM Functional Blocks

STS-3

Section/Line

Termination

STS-3

Section/Line

Termination

M
U
X

STS-3 Path

Termination

(VC-4)

STS-1 Path

Termination

(VC-3)

M
U
X

DS3/E3

MAPPER

M
U
X

DS3/E3
Desync

Add/Drop

DS3/E3

Framer

Line

DS3/E3

Framer

EoPoS

EoS (VC-3/STS-1)

SERDES

SERDES

EoS (VC-4/STS-3c)

Line DS3/E3 side

B3ZS/

HDB3

line coder

M
U
X

to

Encapsulated

Ethernet

STS-3/STM-1

Side

Drop Direction

Add Direction

• Supports M23 DS3, C-bit DS3, G.751 E3, and G.832 E3 facilities

• Mapping/demapping of three DS3/E3 tributaries to/from STS-3/STM-1 through STS-1 or AU-3 or TU-3/AU-4

• Fully integrated and compliant DS3/E3 mapper/demapper and synchronizers/desynchronizers per

Telcordia, ANSI, and ITU standards

• High speed DS3/E3/STS-1/STS-3 overhead insertion/extraction with full access to all overhead bytes

• Full-featured DS3/E3/STS-1/STS-3 defect and performance monitoring (PM) support Large PM counters

for accumulation intervals up to one second

• Loopback capabilities at both STS-3/STM-1 side and line DS3/E3 side

• Dual STS-3/STM-1 155.52Mbps serial interfaces with receive clock recovery and transmit clock synthesis

• From a single reference clock the CLAD (cLock rate adapter) generates clock references for DS3

(44.736MHz), E3 (34.368MHz), and/or STS-3/STM-1 reference (77.76/19.44MHz)

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