Rainbow Electronics MAX1813 - Manual (Page 13)

MAX1813
Dynamically-Adjustable, Synchronous Step-Down
Controller with Integrated Voltage Positioning
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Pin Description (continued)
PIN NAME FUNCTION
11 REF
+2.0V Reference Voltage Output. Bypass to GND with a 0.22 µF or greater capacitor. The reference
can sink and source ±40µA (min) for external loads. Loading REF degrades FB accuracy according to
the REF load regulation error.
12 ILIM
Current-Limit Adjustment. The PGND - VPCS current-limit threshold defaults to 50mV if ILIM is tied to
V
CC . In adjustable mode, the current-limit threshold voltage is 1/10th the voltage seen at ILIM over a
500mV to 2.0V range. The logic threshold for switchover to the 50mV default value is approximately
V
CC - 1V. Connect ILIM to REF for a fixed 200mV threshold.
13 PGOOD
Open-Drain Power-Good Output. PGOOD is normally high when the output is in regulation. If V FB is not
within a +10%/-12.5% window of the DAC setting, PGOOD is asserted low. During DAC code
transitions, PGOOD is forced high until 1 clock period after the slew-rate controller finishes the
transition. PGOOD is low in shutdown, undervoltage lockout, and during soft-start. Any fault condition
forces PGOOD low, and it remains low until the fault is cleared.
14 GND Analog Ground
15 PGND Power Ground. PGND is one of the inputs to the current-limit comparator.
16 DL
Low-Side Gate-Driver Output. DL swings from GND to V DD . DL is forced high when a fault occurs, and
at the end of the shutdown sequence.
17 V DD
Supply Input for the DL Gate Drive. Connect to the system supply voltage (4.5V to 5.5V). Bypass to
PGND with a 1
µF or greater capacitor.
18 SUS
Suspend-Mode Control Input. When SUS is high, the suspend-mode VID code, as programmed by S0
and S1, is delivered to the DAC. SUS overrides ZMODE. Connect SUS to GND if the suspend-mode
multiplexer is not used. See Table 6.
19 ZMODE
Performance-Mode Mux Contol Input. If SUS is low, ZMODE selects between two different VID codes.
If ZMODE = GND with CODE = V
CC , or ZMODE = V CC with CODE = GND, the VID code is set by the
logic-level voltages on D0 −D4. When initially entering impedance mode, the VID code is determined
by the impedance at D0 −D4. See Tables 5 and 7.
20 CODE
Code Select Input. CODE acts like another VID code input to select between the Intel Mobile Voltage
Position II (IMVP-II™) or Coppermine™ VID codes. CODE also determines the polarity of the ZMODE
input. See Tables 5 and 7.
21 −25 D4 −D0
VID Code Inputs. D0 is the LSB and D4 is the MSB of the internal 5-bit DAC (see Tables 5 and 7). If
ZMODE = GND with CODE = V
CC , or ZMODE = V CC with CODE = GND, D0 −D4 are high-impedance
digital inputs, and the VID code is set by the logic-level voltages on D0 −D4. When initially entering
impedance mode, the VID code is determined by the impedance at D0 −D4 as follows:
Logic Low = source impedance is ≤1kΩ ±5%
Logic High = source impedance is ≥100kΩ ±5%.
26 BST
Boost Flying-Capacitor Connection. Connect to an external capacitor and diode according to the
standard high-power application circuit (Figure 1). An optional resistor in series with BST allows DH
pullup current to be adjusted.
27 LX
External Inductor Connection. Connect LX to the switched side of the inductor. LX serves as the lower
supply rail for the DH high-side gate driver. LX does not connect to the current-limit comparator.
28 DH High-Side Gate Driver Output. DH swings from LX to BST.