Table 6. suspend-mode output voltages, Table 7. zmode polarity table – Rainbow Electronics MAX1813 User Manual
Page 22
MAX1813
Dynamically-Adjustable, Synchronous Step-Down
Controller with Integrated Voltage Positioning
22
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an internal 40k
Ω pullup for about 4µs to see if the pin
voltage can be forced high (Figure 7). If the pin voltage
cannot be pulled to a logic high, the pin is considered
low impedance, and its impedance-mode logic state is
low. If the pin can be pulled to a logic high, the imped-
ance is considered high and so is the impedance-
mode logic state. Similarly, if the voltage level on the
pin is a logic high, an internal switch connects the pin
to an internal 8k
Ω pulldown to see if the pin voltage can
be forced low. If so, the pin is high impedance, and its
impedance-mode logic state is high. In either sampling
condition, if the pin’s logic level does not change, the
pin is determined to be low impedance, and the imped-
ance-mode logic state is low.
A high pin impedance (logic high) is 100k
Ω or greater,
and a low impedance (logic low) is 1k
Ω or less. The
guaranteed levels for these impedances are 95k
Ω and
1.05k
Ω to allow the use of standard 100kΩ and 1kΩ resis-
tors with 5% tolerance.
Output Voltage Transition Timing (TIME)
The MAX1813 is designed to perform output voltage
transitions in a controlled manner, automatically mini-
mizing input surge currents. This feature allows the cir-
cuit designer to achieve nearly ideal transitions,
guaranteeing just-in-time arrival at the new output volt-
age level with the lowest possible peak currents for a
given output capacitance. This makes the IC very suit-
able for IMVP-II CPUs and other CPUs that operate in
two or more modes with different core voltage levels.
The IMVP-II CPUs operate at multiple clock frequencies
and require multiple core voltages. When transitioning
*Float = no connection
D0
D1
D2
D3
D4
CODE
ZMODE
ZMODE
MUX
S0/S1
DECODER
CODE
SEL0 SEL1
OUT
OUT
01 OR 10
IN
IMPEDANCE
DECODER
IN
OUT
00 OR 11
SUS MUX
SUS
OUT
DAC
1
0
S0
S1
SUS
D0-D4
DECODER
OUT
MAX1813
(FIGURE 7)
Figure 6. Internal Multiplexers Block Diagram
S1
S0
OUTPUT VOLTAGE (V)
GND
GND
0.975
GND
REF
0.950
GND
Float*
0.925
GND
V
CC
0.900
REF
GND
0.875
REF
REF
0.850
REF
Float*
0.825
REF
V
CC
0.800
Float*
GND
0.775
Float*
REF
0.750
Float*
Float*
0.725
Float*
V
CC
0.700
V
CC
GND
0.675
V
CC
REF
0.650
V
CC
Float*
0.625
V
CC
V
CC
0.600
Table 6. Suspend-Mode Output Voltages
CODE
ZMODE
0
0
Impedance Mode
0
1
Logic Mode
1
0
Logic Mode
1
1
Impedance Mode
Table 7. ZMODE Polarity Table