Rainbow Electronics MAX1545 - Manual (Page 22)

MAX1519/MAX1545
Dual-Phase, Quick-PWM Controllers for
Programmable CPU Core Power Supplies
22 ______________________________________________________________________________________
than the current limit set by ILIM. The transition time is
given by:
where f SLEW = 500kHz ✕ 30k Ω / R
TIME , V OLD is the
original DAC setting, V NEW is the new DAC setting, and
V
LSB
is the DAC’s smallest voltage increment. The
additional two clock cycles on the falling edge time are
due to internal synchronization delays. See TIME
Frequency Accuracy in the Electrical Characteristics for
f
SLEW limits.
The practical range of R
TIME
is 15k Ω to 150kΩ corre-
sponding to 1.0µs to 10µs per 25mV step. Although the
DAC takes discrete steps, the output filter makes the
transitions relatively smooth. The average inductor cur-
rent required to make an output voltage transition is:
Fault Protection
Output Overvoltage Protection
(MAX1545 Only)
The overvoltage protection (OVP) circuit is designed to
protect the CPU against a shorted high-side MOSFET by
drawing high current and blowing the battery fuse. The
MAX1519/MAX1545 continuously monitor the output for
an overvoltage fault. During normal forced-PWM opera-
tion (SKIP = high), the controller detects an OVP fault if
the output voltage exceeds the set DAC voltage by
more than 13% (min). During pulse-skipping operation
(SKIP = REF or GND), the controller detects an OVP
fault if the output voltage exceeds the fixed 2V (typ)
threshold. When the OVP circuit detects an overvoltage
fault, it immediately sets the fault latch, pulls VROK low,
and activates the shutdown sequence.
This action discharges the output filter capacitor and
forces the output to ground. If the condition that caused
the overvoltage (such as a shorted high-side MOSFET)
persists, the battery fuse blows. The controller remains
shut down until the fault latch is cleared by toggling
SHDN or cycling the V
CC power supply below 1V.
Overvoltage protection can be disabled through the “no-
fault” test mode (see the No-Fault Test Mode section).
Output Undervoltage Shutdown
The output UVP function is similar to foldback current
limiting, but employs a timer rather than a variable current
limit. If the MAX1519/MAX1545 output voltage is under
70% of the nominal value, the controller activates the
shutdown sequence and sets the fault latch.
Once the controller ramps down to the 0V DAC code
setting, it forces the DL_ low-side gate-driver high, and
pulls the DH_ high-side gate-driver low. Toggle SHDN
or cycle the V
CC power supply below 1V to clear the
fault latch and reactivate the controller. UVP is ignored
during output voltage transitions and remains blanked
I
C V f
L OUT LSB SLEW
≅ Ч Ч
t
f
V V
V
for V ri g
t
f
V V
V
for V falling
SLEW
SLEW
OLD NEW
LSB
OUT
SLEW
SLEW
OLD NEW
LSB
OUT
≈

 

≈

 

+








−
−
1
1
2
sin
SUS
V DAC
TIME
CLOCK
VROK
VROK BLANKING VROK BLANKING
OUTPUT SET BY SUS AND S0–S1
OUTPUT SET BY D0–D4
1 LSB PER R TIME CYCLE
t SLEW t BLANK = 24 CLKS t SLEW t BLANK = 24 CLKS
Figure 4. Suspend Transition