Rainbow Electronics MAX1545 - Manual (Page 28)

MAX1519/MAX1545
Dual-Phase, Quick-PWM Controllers for
Programmable CPU Core Power Supplies
28 ______________________________________________________________________________________
Integrator Amplifier
A feedback amplifier forces the DC average of the
feedback voltage to equal the VID DAC setting. This
transconductance amplifier integrates the feedback
voltage and provides a fine adjustment to the regulation
voltage (Figure 5), allowing accurate DC output voltage
regulation regardless of the output ripple voltage. The
feedback amplifier has the ability to shift the output
voltage. The differential input voltage range is at least
±80mV total, including DC offset and AC ripple. The
integration time constant can be set easily with an
external compensation capacitor at the CCV pin. Use a
capacitor value of 47pF to 1000pF (47pF, typ).
Differential Remote Sense
The multiphase Quick-PWM controllers include differen-
tial remote-sense inputs to eliminate the effects of volt-
age drops down the PC board traces and through the
processor’s power pins. The remote output sense (FBS)
is accomplished by summing the remote-sense voltage
into the positive terminal of the voltage-positioning
amplifier (Figure 10). The controller includes a dedicat-
ed input and internal amplifier for the remote ground
sense. The GNDS amplifier adds an offset directly to the
feedback voltage, adjusting the output voltage to coun-
teract the voltage drop in the ground path. Together, the
feedback sense resistor (R
FBS ) and GNDS input sum
the remote-sense voltages with the feedback signals
that set the voltage-positioned output, enabling true dif-
ferential remote sense of the processor voltage.
Connect the feedback sense resistor (R
FBS ) and
ground-sense input (GNDS) directly to the processor’s
core supply remote-sense outputs as shown in the
Standard Applications Circuit.
Offset Amplifier
The multiphase Quick-PWM controllers include a third
amplifier used to add small offsets to the voltage-posi-
tioned load line. The offset amplifier is summed directly
with the feedback voltage, making the offset gain inde-
pendent of the DAC code. This amplifier has the ability
to offset the output by ±100mV.
The offset is adjusted using resistive voltage-dividers at
the OFS input. For inputs from 0 to 0.8V, the offset
amplifier adds a negative offset to the output that is
equal to 1/8 the voltage appearing at the selected OFS
input (V
OUT = V DAC - 0.125
× V
OFS ). For inputs from
1.2V to 2V, the offset amplifier adds a positive
offset to the output that is equal to 1/8 the difference
between the reference voltage and the voltage appear-
ing at the selected OFS input (V
OUT = V DAC + 0.125
×
(V REF - V OFS )). With this scheme, the controller sup-
ports both positive and negative offsets with a single
input. The piecewise linear transfer function is shown in
the Typical Operating Characteristics. The regions of
the transfer function below zero, above 2V, and
between 0.8V and 1.2V are undefined. OFS inputs are
disallowed in these regions, and the respective effects
on the output are not specified.
The controller disables the offset amplifier during
suspend mode (SUS = REF or high).
Forced-PWM Operation (Normal Mode)
During normal mode, when the CPU is actively running
(SKIP = high, Table 7), the Quick-PWM controller oper-
ates with the low-noise forced-PWM control scheme.
Forced-PWM operation disables the zero-crossing
comparator, forcing the low-side gate-drive waveform
to constantly be the complement of the high-side gate-
drive waveform. This keeps the switching frequency
fairly constant and allows the inductor current to
Table 7. S SK KIIP P Settings*
SKIP
CONNECTION
MODE OPERATION
High
(3.3V or V CC )
Two-phase
forced-PWM
The controller operates with a constant switching frequency, providing low-noise forced-PWM
operation. The controller disables the zero-crossing comparators, forcing the low-side gate-
drive waveform to constantly be the complement of the high-side gate-drive waveform.
REF
Two-phase
pulse skipping
The controller automatically switches over to PFM operation under light loads. The controller
keeps both phases active and uses the automatic pulse-skipping control
scheme—alternating between the primary and secondary phases with each cycle.
GND
One-phase
pulse skipping
The controller automatically switches over to PFM operation under light loads. Only the main
phase is active. The secondary phase is disabled—DHS and DLS are pulled low so LXS is
high impedance.
*Settings for a dual 180° out-of-phase controller.