Table 31. dpio_ mode bit configuration – Rainbow Electronics MAX1329 User Manual

Page 59

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MAX1329/MAX1330

12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,

Reference, Voltage Monitors, and Temp Sensor

______________________________________________________________________________________

59

Table 31. DPIO_ Mode Bit Configuration

MODE

D P_ M D 3 D

P_ M D 2 D

P_ M D 1 D

P_ M D 0

MAX1329

MAX1330

DESCRIPTION

0

0

0

0

GPI

GPI

Digital input. DPIO_ logic-level read from DP_LL register bit.

0

0

0

1

WUL

WUL

Digital input. A falling edge on WUL sets the OSCE bit enabling
the oscillator.

0

0

1

0

WUH

WUH

Digital input. A rising edge on WUH sets the OSCE bit enabling
the oscillator.

0

0

1

1

SLP

SLP

D i g i tal i np ut. A l og i c- l ow on

SLP over r i d es the r eg i ster setti ng s and

p ow er s d ow n al l ci r cui ts excep t V M 1 and al l the r eg i ster s. A l og i c-
hi g h on

SLP tr ansfer s the p ow er contr ol b ack to the r eg i ster

setti ng s. S ee the C l ock C ontr ol Reg i ster secti on.

0

1

0

0

SHDN

SHDN

Digital input. A logic-low on

SHDN overrides the register

settings and powers down all circuits. A logic-high on

SHDN

transfers the power control back to the register settings.

0

1

0

1

DLAB

DLAB

Digital input. A rising edge on DLAB shifts DACA and DACB
data from the input register to the output register or sequences
through FIFOA if enabled. For the MAX1330, this applies only
to DACA.

0

1

1

0

CONVST

CONVST

Digital input. CONVST controls acquisition time and conversion
start. A falling edge on CONVST puts the ADC in acquisition
mode. A rising edge on CONVST starts a single conversion.

0

1

1

1

DLDA

DLDA

Digital input. A rising edge on DLDA shifts DACA data from the
input to output register or sequences through FIFOA if enabled.

1

0

0

0

DSWA

DSWA

Digital input. DSWA and OSW3 control the DACA and op amp 3
switches, respectively. See the Switch Control Register section.

1

0

0

1

DLDB

Digital input. A rising edge on DLDB shifts DACB data from the
input to output register.

1

0

1

0

DSWB

OSW2

Digital input. DACB and op amp 2 control the DACB and op
amp 2 switches, respectively. See the Switch Control Register
section.

1

0

1

1

OSW1

OSW1

Digital input. Op amp 1 switch control. See the Switch Control
Register
section.

1

1

0

0

SPDT1

SPDT1

Digital input. SPDT1 controls the SPDT1 switch. See the Switch
Control Register
section.

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