Diodes ZXCT1032 - Manual (Page 8)

ZXCT1032
Issue 4 - June 2007 8 www.zetex.com
© Zetex Semiconductors plc 2007
4 When C
T
has discharged to "zero" (< 80mV) the latch is reset which re-enables the output drive
and allows the device to re-enter soft-start mode.
5 In the event of an overload or short circuit, stages 3 and 4 repeat indefinitely until the fault is
removed.
In the case of a permanent fault damage to the PMOS transistor should not occur because it is
only on for a short part of the overall cycle.
6 The current monitor has an intentional output offset of +150mV. If V
ISET
is held at 0V, the output
of the trip comparator will be permanently high and the output will be completely disabled.