Impulse ACB-104.ULTRA (3514) - Manual (Page 9)

© Sealevel Systems, Inc. - 7 - ACB-104.ULTRA User Manual
Technical Description
The Sealevel Systems’ ACB-104.ULTRA adapter was designed for seamless
integration into any PC/104-Plus based system. The ACB-104.ULTRA adapter
requires one IRQ, an 8 byte block of I/O address and a 16K block or 256K block of
memory address and additionally, the IUSC requires a 256 byte block of memory.
Features
Single channel high speed sync/async wide area network (WAN) interface
RS-232, RS-422/449, EIA-530, V.35 and RS-485 serial interface capability with
versatile cabling options
Multi-protocol capable including: PPP (point-to-point protocol), Frame Relay,
X.25, high-speed Async, Bi-Sync, Mono-Sync, HDLC, SDLC, etc.
Ideal for T1, Fractional T1, E1, and ISDN and other WAN applications
On-board Z16C32 (IUSC™) with built in DMA controller and 32 byte FIFO
buffer
Up to 10 Mbps burst mode
256K of on-board RAM
Link list DMA supported
32-bit data path
OEM Security feature available as an option
IUSC™
The ACB-104.ULTRA is based on a single Zilog Z16C32 IUSC (Integrated
Universal Serial Controller). The IUSC has a built-in DMA controller that allows
high-speed data transfers directly to and from the 256K block of on-board memory.
The IUSC’s built-in DMA controller supports 4 different modes of DMA transfer:
Single Buffer, Pipelined, Array, and Link List. An on-board 20MHz oscillator clocks
the IUSC.
RAM
The memory window is located by the BIOS PCI setup. The window size is one
256K linear block. High Memory options - 16 pages of 16K memory blocks totaling
256K or one linear block of 256K memory. In paged mode the registers are located in
the I/O registers.