Teledyne LeCroy TA700 Compliance User Guide - Manual (Page 57)

• 1.08
PCI BUS MULTI-DATA PHASE & TRDY# CYCLES
In this test five transactions must be executed. The first is a memory read, the second is a memory
write, the third is a memory read multiple, the fourth is a memory read line and the last is a memory
write & invalidate. All transactions have three data phases.
Compliance Test
57 Rev. 1.0