Figure 4-15: lvds lcd connector location, Pin no. description pin no. description – IEI Integration PCISA-9652 v1.01 User Manual

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PCISA -9652 Half-Size CPU Card

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CN Pinouts:

See Table 4-16

The connector supports one or two channel 24-bit LVDS panel.

Figure 4-16: LVDS LCD Connector Location

PIN NO.

DESCRIPTION

PIN NO.

DESCRIPTION

1 GND

2 GND

3 1

st

LVDS data0 output +

4

1

st

LVDS data0 output -

5 1

st

LVDS data1 output +

6

1

st

LVDS data1 output -

7 1

st

LVDS data2 output +

8

1

st

LVDS data2 output -

9 1

st

LVDS clock output +

10

1

st

LVDS clock output -

11 1

st

LVDS data3 output +

12

1

st

LVDS data3 output -

13 GND

14 GND

15 2

nd

LVDS data0 output +

16 2

nd

LVDS data0 output -

17 2

nd

LVDS data1 output +

18 2

nd

LVDS data1 output -

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