Figure 10. output alarm circuit optically isolated, 8 vdc on/alarm indicator power options, Output alarm circuit optically isolated – KEPCO HSF 300W Series (no suffix) Operator Manuals User Manual

Page 13: Pf power failure optocoupler timing diagram, Dip switch settings for vdc on/alarm power options, R 3.8)

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HSF 300W 050113

11

The logic alarm circuit is a diode transistor optical coupler (see Figure 10). The transistor is nor-

mally conducting. When the alarm is activated upon detection of power loss, overvoltage, fan

fault, overtemperature or overcurrent condition, the transistor cuts off and the collector emitter cir-

cuit is open. Figure 11 is a timing diagram of the power fail signal.

The default state of the alarm is logic low. The sink current for the optocoupler is 50mA maximum,

the maximum collector to emitter saturation voltage is 0.40 Volts, and the collector to emitter volt-

age is 40 volts maximum. The PF signals are isolated from the AC input and DC output.

FIGURE 10. OUTPUT ALARM CIRCUIT OPTICALLY ISOLATED

FIGURE 11. ±PF POWER FAILURE OPTOCOUPLER TIMING DIAGRAM

3.8

VDC ON/ALARM INDICATOR POWER OPTIONS

To use the internal power supply reference voltage to power the VDC ON/ALARM indicator, set

Position 7 of SW1 to ON and Position 8 of SW2 to OFF (default) (see Figure 12A). Load effect is

±1% maximum. To use the HSF output voltage to power the VDC ON/ALARM indicator, set Position

7 of SW1 to OFF and Position 8 of SW2 to ON (see Figure 12B). Load effect is ±0.6% maximum,

however the minimums specified in Table 4 must be observed for the indicator to function.

FIGURE 12. DIP SWITCH SETTINGS FOR VDC ON/ALARM POWER OPTIONS

3043492

7

7 DC ON PWR BY REF

7

SW1

8

SW2

8

OFF

ON

OFF

ON

USE REFERENCE SUPPLY

(FACTORY DEFAULT)

TO POWER "DC ON"

A

TO POWER "DC ON"

USE HSF OUTPUT VOLTAGE

B

(REQUIRES MINIMUM OUTPUT VOLTAGE)

7
8

8

SW1

7

SW2

OFF

ON

ON

OFF

DC ON PWR BY OUTPUT V 8

8

7

7
8

8

7

TAB

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