7 lpc interface, Figure 9-21, Lpc output timing diagram – AMD Geode SC2200 User Manual
Page 383: Figure 9-22, Lpc input timing diagram, Table 9-28, Lpc and serirq timing parameters
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AMD Geode™ SC2200 Processor Data Book
401
Electrical Specifications
32580B
9.3.7
LPC Interface
Figure 9-21. LPC Output Timing Diagram
Figure 9-22. LPC Input Timing Diagram
Table 9-23. LPC and SERIRQ Timing Parameters
Symbol
Parameter
Min
Max
Unit
Comments
t
VAL
Output Valid delay
0
17
ns
After PCICLK rising edge
t
ON
Float to Active delay
2
ns
After PCICLK rising edge
t
OFF
Active to Float delay
28
ns
After PCICLK rising edge
t
SU
Input Setup time
7
ns
Before PCICLK rising edge
t
HI
Input Hold time
0
ns
After PCICLK rising edge
PCICLK
LPC Signals/
SERIRQ
t
ON
t
VAL
t
OFF
PCICLK
LPC Signals/
SERIRQ
t
SU
t
HI
Input
Valid
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