MagTek 3V & 5V - Manual (Page 7)

Shift-Out IntelliHead
3
SHIFT-OUT PROTOCOL
Refer to MagTek specification 99875337 (99875336 or 99875259 for 5V units) for details of the Shift-
Out Protocol. The additional information below is needed for the firmware designer to assign the
memory-tracks of the ASIC (A, B, and C) to the physical magnetic head tracks (1, 2, and 3).
The on-chip memory tracks of the Shift-Out IntelliHead are permanently assigned to particular tracks
of the magnetic head via internal wires connecting the head coil wires to particular inputs of the built-
in ASIC. Tracks ‘A’ and ‘B’ of the internal ASIC correspond to tracks ‘1/3’ and ‘2’ of the reader
respectively as it is shown in Figure 2. When the 2-track IntelliHead/spring is mounted as intended,
with the centerline of the spring mounting holes running through the center of track 2, it may be used
as either a track 1 & 2 reader or a track 2 & 3 reader. Typically the dual-track IntelliHead serves as a
track 1 & 2 reader. For the less common track 2 & 3 reader, this IntelliHead/spring assembly may be
used in an inverted configuration on the same chassis used by a track 1 & 2 reader. In this case, on-
chip memory track ‘A’ corresponds to physical magnetic stripe track 3 and on-chip memory track ‘B’
corresponds to physical magnetic stripe track 2. This is important since it affects the arrangement of
the data upon extraction from the chip (see below).
Similar concerns apply for the triple-track Shift-Out IntelliHead. As it is oriented in tracks ‘A’, ‘B’,
and ‘C’ of the internal ASIC correspond to tracks ‘1’, ‘2’, and ‘3’ of the reader respectively. The
IntelliHead may be mounted with the opposite orientation if desired, but firmware must anticipate this
re-mapping of ASIC memory tracks to physical magnetic head tracks.
SHIFT-OUT TIMING
Refer to MagTek specification 99875337 (99875336 or 99875259 for 5V units) for details of the Shift-
Out Timing. The following exception exists for the IntelliHead in contrast to the ASIC specification
given in 99875337.
Trst (Reset) = 10

s minimum (not shown in timing diagram)
VDD off-time to guarantee a reset for the ASIC/Head unit. This is due to an RC power supply filter
inside the head. R = 10Ω

5% and C = 0.1

F + 80%, -20%.