Atmel AVR XMEGA 8/16-bit High Performance Low Power Flash Microcontrollers User Manual
Page 3
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www.atmel.com
picoPower Technology
Reducing power consumption—maintaining performance
picoPower — Best MCU power budget
Atmel’s picoPower technology reduces power
consumption in both sleep and active mode. With
picoPower technology the embedded designer
can reduce the applications power consumption
while maintaining performance.
True 1.6 Volt Operation
AVR XMEGA offers true 1.6 Volt operation. All functions including ADC, DAC, Flash- and EEPROM
memories are all operating down to 1.6V. This allows safe operation directly from a 1.8V ±10% power
supply. it also enables deeper battery discharge to increase battery life.
Minimized Leakage Current
AVR XMEGA leakage current is only 100 nA while still maintaining
full RAM and register retention. This reduces power consumption
for applications spending most time in sleep mode.
Ultra Low Power 32 kHz Crystal Oscillator
AVR XMEGA’s Real Time Counter consumes only 500 nA while
running from a 32.768 kHz Crystal Oscillator.
Sleep modes
XMEGA has five different sleep modes to turn off unused modules
and reduce the power consumption in the application. Many
sleep modes makes it easy to find the perfect fit for the applica-
tion. The granularity is further enhanced by the innovative Power Reduction Register technology.
in idle sleep mode all peripherals operate while the CPU is sleeping to reduce the power consumption. with
up to 50%, while event handling, communication and data input/output still run.
in power-save mode, XMEGA uses 650nA to run the Real Time Counter and have full SRAM and register
retention offering industry leading low power numbers. Enabling Watchdog and Brown Out adds only 1uA.
in power-down mode, XMEGA uses only 100nA with SRAM and register retetion, and 5us wake-up time
from pin change on any i/O pin and TWi address match.
Standby and extended standby sleep modes are identical to power-down and power-save, except the
external oscillator is kept running to reduce wake-up time.
CPU
I/O
AC
ADC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
ASYNC. CLK
MAIN CLK
CPU
I/O
AC
ADC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
Idle mode
CPU
I/O
AC
ADC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
ASYNC.
CLK.
MAIN
CLK.
BOD
CPU
I/O
AC
ADC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
BOD
CPU
I/O
AC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
ADC
ASYNC.
BOD
CPU
I/O
AC
ADC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
ASYNC.
CLK.
MAIN
CLK.
BOD
CPU
I/O
AC
ADC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
BOD
CPU
I/O
AC
FLASH
WDT
T/C
PIN
CHANGE
INT.
DMA
EVENT
SYS.
TWI
SPI
USART
ADC
ASYNC.
BOD
Power-save mode
Power-down mode