Atmel AVR XMEGA 8/16-bit High Performance Low Power Flash Microcontrollers - Manual (Page 8)

07
AVR XMEGA™ MiCROCOnTOLLERS Everywhere You Are ®
Clock System
AVR XMEGA’s clock system allow flexible change of frequency. Dynamic Clock Switching allows the Embedded
Designer to tune performance and power consumption to fit the application. The internal PLL and prescaler
can be used to scale the clock sources dynamically up or down to further match application requirements.
With a built-in External Oscillator failure detection and internal RC oscillator with ± 1% accuracy over tempera-
ture and voltage, XMEGA offers the most safe, reliable and flexible clock system.
interrupt Controller
AVR XMEGA include a multi level interrupt controller. Three priority
levels are supported, where higher level interrupts are prioritized and
executed before low level interrupts. All peripherals can be assigned
any interrupt level.
Automatic
Calibration Internal
Clock
Sources
External
Clock
Sources
High
Frequency
PLL
Prescaler
Block
Ref
er
enc
e
clk
CPU
clk
PER
clk
PER2
clk
PER4
clk
RTC
High-level
Medium-level
Low-level
Program Flow and Interrupt execution
1
2
3
4
5
1 2 3 4 5
Main
Main Main
HOLD
HOLD
High-level
Medium-level
Program Flow and Interrupt execution
1
1
2
3
4
1 2 3 4
Main
Main Main
Medium-level
HOLD
HOLD
input and Output
AVR XMEGA offers flexible i/O pin configuration with various sensing,
wake-up, synchronous/asynchronous, and driver settings. i/O pin’s
direction, value and logic state are read through separate registers.
The optional Slew-Rate limitation reduces EMi. Virtual ports regis-
ters allow single cycle pin manipulation. This makes software for
bit-banging smaller and faster.
A higher level interrupt will halt execution of a lower level interrupt
routine. The lower level interrupt routine will continue and finish
after the higher level interrupt routine finishes.
A second interrupt at an interrupt level already being serviced, will
pend until the first interrupt routine finishes.