Advantech RISC SOM-A2558 User Manual

Page 20

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User’s Manual for Advantech SOM-A2558 series module V1.00

20

2

2.

77

nSA_SKT1_W

AIT

I PCMCIA/CF slot 1 wait signals.

Driven low by the PCMCIA card to
extend the length of the transfers
to/from the PXA255 processor.

Pull high with
10Kohm

78

nSA_SKT0_CD

2

I PCMCIA/CF slot 0 card detect pin

2.

No pulling

79

nSA_SKT0_IOI

S16

I IO Select 16. (input) Acknowledge

from the PCMCIA card that the
current address is a valid 16 bit
wide I/O address.

Pull high with
10Kohm

80 SA_SKT0_VCC P PCMCIA/CF slot 0 power pin.

Powered

81

nSA_SKT1_IOI

S16

I PCMCIA/CF slot 0 IO Select 16.

Acknowledge from the PCMCIA
card that the current address is a
valid 16 bit wide I/O address.

Pull high with
10Kohm

82

nSA_PWR_ON

I System suspend/wakeup input pin.

Falling edge triggered.

Pull high with
10Kohm

83

nBATT_FALT

I Main Battery Fault. Signals that

main battery is low or removed.
Assertion causes PXA255
processor to enter sleep mode or
force an Imprecise Data Exception,
which cannot be masked. PXA255
processor will not recognize a
wakeup event while this signal is
asserted. Minimum assertion time
for nBATT_FAULT is 1 ms.

Pull high with
100Kohm

84

nSW_RESET

I System software reset input pin.

Falling edge triggered.

Pull high with
10Kohm

85

nVDD_FALT

I VDD Fault. Signals that the main

power source is going out of
regulation. nVDD_FAULT causes
the PXA255 processor to enter
sleep mode or force an Imprecise
Data Exception, which cannot be
masked. nVDD_FAULT is ignored
after a wakeup event until the
power supply timer completes
(approximately 10 ms). Minimum
assertion time for nVDD_FAULT is
1 ms.

Pull high with
100Kohm

86

nRESET_OUT O Reset Out. Asserted when

nRESET is asserted and deasserts
after nRESET is deasserted but
before the first instruction fetch.
nRESET_OUT is also asserted for
“soft” reset events: sleep,
watchdog reset, or GPIO reset.

No pulling

87

GND

P Ground

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