Table 18. txp output selection, Table 19. receiver input selection, Interrupt status (address 20h) (read only)” on – Cirrus Logic CS42518 User Manual

Page 63: Interrupt, Each s

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DS584F2

63

CS42518

6.19

Receiver Mode Control 2 (address 1Fh)

6.19.1 TXP MULTIPLEXER (TMUXX)

Default = 000
Function:

Selects which of the eight receiver inputs will be mapped directly to the TXP output pin.

6.19.2 RECEIVER MULTIPLEXER (RMUXX)

Default = 000
Function:

Selects which of the eight receiver inputs will be mapped to the internal receiver.

6.20

Interrupt Status (address 20h) (Read Only)

For all bits in this register, a “1” means the associated interrupt condition has occurred at least once since the reg-
ister was last read. A ”0” means the associated interrupt condition has NOT occurred since the last reading of the
register. Reading the register resets all bits to 0. Status bits that are masked off in the associated mask register will
always be “0” in this register.

7

6

5

4

3

2

1

0

Reserved

TMUX2

TMUX1

TMUX0

Reserved

RMUX2

RMUX1

RMUX0

TMUX2

TMUX1

TMUX0

Description

0

0

0

Output from pin RXP0

0

0

1

Output from pin RXP1

0

1

0

Output from pin RXP2

0

1

1

Output from pin RXP3

1

0

0

Output from pin RXP4

1

0

1

Output from pin RXP5

1

1

0

Output from pin RXP6

1

1

1

Output from pin RXP7

Table 18. TXP Output Selection

RMUX2

RMUX1

RMUX0

Description

0

0

0

Input from pin RXP0

0

0

1

Input from pin RXP1

0

1

0

Input from pin RXP2

0

1

1

Input from pin RXP3

1

0

0

Input from pin RXP4

1

0

1

Input from pin RXP5

1

1

0

Input from pin RXP6

1

1

1

Input from pin RXP7

Table 19. Receiver Input Selection

7

6

5

4

3

2

1

0

UNLOCK

Reserved

QCH

DETC

DETU

Reserved

OverFlow

RERR

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