Cirrus Logic CS4362A - Manual (Page 38)

38 DS617F2
CS4362A
ues. When this bit is enabled, the DAC will ramp down the volume prior to a filter-mode change and ramp
from mute to the original volume value after a filter-mode change according to the settings of the Soft and
Zero Cross bits in the Mode Control 3 register. When disabled, an immediate mute and unmute is per-
formed.
Loss of clocks or a change in the FM bits will always cause an immediate mute; unmute in these condi-
tions is affected by the RMP_UP bit.
Note: For best results, it is recommended that this feature be used in conjunction with the RMP_UP bit.
6.5 Invert Control (Address 05h)
6.5.1 Invert Signal Polarity (Inv_Xx)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
6.6 Mixing Control Pair 1 (Channels A1 & B1)(Address 06h)
Mixing Control Pair 2 (Channels A2 & B2)(Address 09h)
Mixing Control Pair 3 (Channels A3 & B3)(Address 0Ch)
6.6.1 Channel A Volume = Channel B Volume (A=B)
Default = 0
0 - Disabled
1 - Enabled
Function:
The AOUTAx and AOUTBx volume levels are independently controlled by the A and the B Channel Vol-
ume Control Bytes when this function is disabled. The volume on both AOUTAx and AOUTBx are deter-
mined by the A Channel Attenuation and Volume Control Bytes (per A-B pair), and the B Channel Bytes
are ignored when this function is enabled.
7 6 5 4 3 2 1 0
Reserved Reserved INV_B3 INV_A3 INV_B2 INV_A2 INV_B1 INV_A1
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
Px_A=B PxATAPI4 PxATAPI3 PxATAPI2 PxATAPI1 PxATAPI0 PxFM1 PxFM0
0 0 1 0 0 1 0 0