Cs4365 – Cirrus Logic CS4365 User Manual
Page 7
DS670F2
7
CS4365
VQ
21
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage. VQ must be
capacitively coupled to analog ground, as shown in the Typical Connection Diagram. The nom-
inal voltage level is specified in the Analog Characteristics and Specifications section. VQ pre-
sents an appreciable source impedance and any current drawn from this pin will alter device
performance. However, VQ can be used to bias the analog circuitry assuming there is no AC
signal component and the DC current is less then the maximum specified in the Analog Char-
acteristics and Specifications section.
FILT+
20
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling cir-
cuits. Requires the capacitive decoupling to analog ground as shown in the Typical Connection
Diagram.
AOUTA1 +,-
AOUTB1 +,-
AOUTA2 +,-
AOUTB2 +,-
AOUTA3 +,-
AOUTB3 +,-
39,40
37,38
35,36
33,34
29,30
27,28
Differential Analog Output (Output) - The full-scale differential analog output level is specified
in the Analog Characteristics specification table.
MUTEC1
MUTEC2
MUTEC3
MUTEC4
MUTEC5
MUTEC6
41
26
25
24
23
22
Mute Control (Output) - The Mute Control pins go high during power-up initialization, reset,
muting, power-down or if the master clock to left/right clock frequency ratio is incorrect. These
pins are intended to be used as a control for external mute circuits on the line outputs to pre-
vent the clicks and pops that can occur in any single supply system. Use of Mute Control is not
mandatory but recommended for designs requiring the absolute minimum in extraneous clicks
and pops.
Hardware Mode Definitions
M0
M1
M2
M3
M4
17
16
15
12
10
Mode Selection (Input) - Determines the operational mode of the device as detailed in
and
Software Mode Definitions
SCL/CCLK
15
Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external
pull-up resistor to the logic interface voltage in I²C
®
Mode as shown in the Typical Connection
Diagram.
SDA/CDIN
16
Serial Control Port Data (Input/Output) - SDA is a data I/O line in I²C Mode and is open drain,
requiring an external pull-up resistor to the logic interface voltage, as shown in the Typical Con-
nection Diagram; CDIN is the input data line for the control port interface in SPI
™
Mode.
AD0/CS
17
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C
Mode; CS is the chip-select signal for SPI Mode.
TST
10, 12
Test - These pins need to be tied to analog ground.
DSD Definitions
DSDA1
DSDB1
DSDA2
DSDB2
DSDA3
DSDB3
3
2
1
48
47
46
Direct Stream Digital Input (Input) - Input for Direct Stream Digital serial audio data. GND if
unused.
DSD_SCLK
42
DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital serial audio interface.
Pin Name
#
Pin Description