Cirrus Logic CS4397 - Manual (Page 15)

CS4397
DS333F1 15
2.0 TYPICAL CONNECTION DIAGRAM
SCLK
Audio
Data
Processor
External Clock
MCLK
AGND
AOUTR+
CS4397
SDATA
VA
AOUTR-
+5V
Analog 0.1
µ
F + 1
µ
F
Mode
Select
(Control Port)
M1 (GND)
M0 (SDA/CDOUT)
AOUTL-
AOUTL+
DGND
VD
MUTE
Analog
Conditioning
Analog
Conditioning
7 22
24
23
19
20
18 9
1
15
13
11
12
4
14
5
M2 (SCL/CCLK)
LRCK
1.0
µ
F +
RST
10
M3 (AD1/CDIN)
M4 (AD0/CS)
2
3
25
0.1 µf 5.6 µf
0.1 µf 100 µf
26
27
VREF
FILT+
FILT-
+5V
Analog
28
6 21
MUTEC
0.1 µf
8
17
+
+
CMOUT
VD
0.1 µf
16
C/H
+5 to +3 V
Digital
Figure 6. Typical Connection Diagram - Hardware Mode (Control Port Mode)