Figure 8. control port timing - i²c format – Cirrus Logic CS4398 User Manual
Page 15

DS568F1
15
CS4398
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT
(Inputs: Logic 0 = GND, Logic 1 = VLC, C
L
= 20 pF)
10. Data must be held for sufficient time to bridge the transition time, t
fc
, of SCL.
Parameter
Symbol
Min
Max
Unit
SCL Clock Frequency
f
scl
-
100
kHz
RST Rising Edge to Start
t
irs
500
-
ns
Bus Free-Time Between Transmissions
t
buf
4.7
-
µs
Start Condition Hold Time (prior to first clock pulse)
t
hdst
4.0
-
µs
Clock Low Time
t
low
4.7
-
µs
Clock High Time
t
high
4.0
-
µs
Setup Time for Repeated Start Condition
t
sust
4.7
-
µs
SDA Hold Time from SCL Falling
(Note 10)
t
hdd
0
-
µs
SDA Setup Time to SCL Rising
t
sud
250
-
ns
Rise Time of SCL and SDA
t
rc
, t
rd
-
1
µs
Fall Time SCL and SDA
t
fc
, t
fd
-
300
ns
Setup Time for Stop Condition
t
susp
4.7
-
µs
Acknowledge Delay from SCL Falling
t
ack
300
1000
ns
t buf
t
hd st
t
l o w
t
h dd
t
hig h
t sud
S top
S t a rt
S D A
S C L
t
irs
R S T
t
hd st
t
rc
t
fc
t sust
t susp
S t a rt
S to p
R e p e a t e d
t
rd
t
fd
t ack
Figure 8. Control Port Timing - I²C Format