Cirrus Logic CS53L21 - Manual (Page 48)

48 DS700PP1
CS53L21
6.8 SPE Control (Address 09h)
SPE_ENABLE
Default: 0
0 - Reserved
1 - ADC Serial Port to SPE
Function:
Selects the digital signal source for the SPE. Note: If DIGMIX = 1, SPE_ENABLE must be 1 for the SPE to
be functional.
Freeze Controls (FREEZE)
Default: 0
Function:
This function will freeze the previous settings of, and allow modifications to be made to all control port reg-
isters without the changes taking effect until the FREEZE is disabled. To have multiple changes in the con-
trol port registers take effect simultaneously, enable the FREEZE bit, make all register changes, then
disable the FREEZE bit.
7 6 5 4 3 2 1 0
Reserved SPE_ENABLE FREEZE Reserved Reserved Reserved SPE_SZC1 SPE_SZC0