Cirrus Logic CS53L21 - Manual (Page 57)

DS700PP1 57
CS53L21
8. EXAMPLE SYSTEM CLOCK FREQUENCIES
8.1 Auto Detect Enabled
*The”MCLKDIV2” pin 4 must be set HI.
Sample Rate
LRCK (kHz)
MCLK (MHz)
1024x 1536x 2048x* 3072x*
8 8.1920 12.2880 16.3840 24.5760
11.025 11.2896 16.9344 22.5792 33.8688
12 12.2880 18.4320 24.5760 36.8640
Sample Rate
LRCK (kHz)
MCLK (MHz)
512x 768x 1024x* 1536x*
16 8.1920 12.2880 16.3840 24.5760
22.05 11.2896 16.9344 22.5792 33.8688
24 12.2880 18.4320 24.5760 36.8640
Sample Rate
LRCK (kHz)
MCLK (MHz)
256x 384x 512x* 768x*
32 8.1920 12.2880 16.3840 24.5760
44.1 11.2896 16.9344 22.5792 33.8688
48 12.2880 18.4320 24.5760 36.8640
Sample Rate
LRCK (kHz)
MCLK (MHz)
128x 192x 256x* 384x*
64 8.1920 12.2880 16.3840 24.5760
88.2 11.2896 16.9344 22.5792 33.8688
96 12.2880 18.4320 24.5760 36.8640