Cirrus Logic CDB53L21 - Manual (Page 22)

22
DS70
0DB1
CDB53L21
6. BLOCK DIAGRAM
Figure 26. Block Diagram
Analog Input
Software Mode
Control Port
Hardware Mode
Switches
CS53L21
S/PDIF Out
(CS8406)
Clocks/Data Header
I²C/SPI Header
FPGA
Oscillator
(socket)
Reset
MCLK
Reset
Reset
MCLK
Reset
Hardware Mode
Switches
Figure 27 on page 23
Figure 27 on page 23
Figure 32 on page 28
Figure 29
on page 25
Figure 30
on page 26
Figure 27 on page 23
Figure 28 on page 24
Figure 31 on page 27
Figure 31
on page 27
Figure 30 on page 26