13 control (ctrl) – address: 28, Cs5464 – Cirrus Logic CS5464 User Manual
Page 32
CS5464
32
DS682F3
8.2.13 Control (Ctrl)
–
Address: 28
Default = 0
PC[7:0]
Phase compensation for channel 2. Sets a delay in voltage relative to current. Phase is signed
and in the range of -1.0
value 1.0 sample (OWR) intervals.
I1gain (I2gain) Sets the gain of the current1 (current2) input.
0 = Gain is set for ±250mV range.
1 = Gain is set for ±50mV range.
STOP
Terminates E
2
PROM command sequence (if used).
0 = No Action
1 = Stop E
2
PROM Commands.
INTOD
Converts INT output pin to an open drain output.
0 = Normal Output
1 = Open-drain Output
NOCPU
Saves power by disabling the CPUCLK output pin.
0 = CPUCLK Enabled
1 = CPUCLK Disabled
NOOSC
Disables the crystal oscillator, making XIN a logic-level input.
0 = Crystal Oscillator Enabled
1 = Crystal Oscillator Disabled
23
22
21
20
19
18
17
16
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
15
14
13
12
11
10
9
8
-
-
-
I2gain
-
-
-
STOP
7
6
5
4
3
2
1
0
-
-
I1gain
INTOD
-
NOCPU
NOOSC
-