Cirrus Logic AN88 - Manual (Page 8)

AN88
8 AN88Rev2
;*************************************************************************************
;* Subroutines
;*************************************************************************************
;*************************************************************************************
;* Routine - initialize
;* Input - none
;* Output - none
;* This subroutine initializes port A for interfacing to the CS5525/6/9 ADC.
;* It provides a time delay for oscillator start-up/wake-up period.
;* A typical start-up time for a 32768 Hz crystal, due to high Q, is 500 ms.
;* Also 1003 XIN clock cycles are allotted for the ADC’s power on reset. The
;* total delay is 555 ms upon power-up (assume uC start-up time is zero).
;*************************************************************************************
initialize
CLRF PORTA ; Initialize PORTA by setting output
; data latches.
BSF STATUS, RP0 ; Select Bank 1
MOVLW 0x04 ; Value used to initialize direction
MOVWF TRISA ; Set RA2 as inputs
; RA0, RA1, RA3, & RA4 as outputs
BCF STATUS, RP0 ; Select Bank 0
BCF PORTA,SDO ; Clear SDO
MOVLW 0x32 ; Load W with delay count
CALL delay ; Delay, Power on Reset 1003 XIN
MOVLW 0xFF ; Load W with delay count
CALL delay ; Delay, Oscillator start-up 158 ms
CALL delay ; Delay, Oscillator start-up 158 ms
CALL delay ; Delay, Oscillator start-up 158 ms
CALL delay ; Delay, Oscillator start-up 158 ms
MOVLW 0x0F ; Reset Serial Port on ADC
MOVWF TEMP
BCF PORTA,CS ; Clear CS
loop MOVLW 0xFF ; Load W with 0xFF
CALL send_spi ; Send 15 0xFF through SPI
DECFSZ TEMP,1 ; Decrement the counter
goto loop ; Repeat loop if counter not zero
MOVLW 0xFE ; Load W with last byte
CALL send_spi ; Move 0xFE to SPDR
BSF PORTA,CS ; Clear CS
RETURN ; Exit subroutine