Cirrus Logic CS61583 - Manual (Page 7)

Any Digital Output
t
r
t
f
10% 10%
90% 90%
Figure 1. Signal Rise and Fall Characteristics
RCLK
(CLKE = 1)
t
pwl1
t
pwh1
RCLK
(CLKE =0)
RPOS
RNEG
RDATA
BPV
h1
t
su1
t
tpw1
Figure 2. Recovered Clock and Data Switching Characteristics
TCLK
TPOS
TNEG
TDATA
t
su2
t
h2
t
pwh2
t
pw2
Figure 3. Transmit Clock and Data Switching Characteristics
CS61583
DS172PP5 7