Cirrus Logic CDB61880 User Manual
Preliminary product information, Features, Description
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Table of contents
Document Outline
- Features
- Description
- 1. CDB61880 Evaluation Board Layout
- 2. Board Component Descriptions
- 2.1 Power Connections
- 2.2 Master Clock Selection
- 2.3 Operating Mode Selection
- 2.4 Line Interface Connections
- 2.5 TXOE Selection
- 2.6 Clock Edge Selection
- 2.7 Jitter Attenuator Selection
- 2.8 Loopback Mode Selection
- 2.9 Line Length/Impedance Selection
- 2.10 Coder/Motorola/Intel Selection
- 2.11 G.772 Monitoring Address Selection
- 2.12 Mux/Non-Mux/BITS Clock Selection
- 2.13 Digital Signal Connections
- 2.14 LOS Indicators
- 2.15 JTAG Connection
- 2.16 Host Interface Connection
- 3. Host Setup Description
- 4. Host Software Interface
- 5. CS61880 Configuration Screens
- 6. Board Configurations
- 7. Evaluation Hints