1 circuit operation – Cirrus Logic EDB9302A User Manual
Page 10
EDB9302A
Technical Reference Manual
10
©
Copyright 2006 Cirrus Logic, Inc.
DS653DB1
4.1 Circuit Operation
The major circuit operation for each page of the schematic will be discussed.
for the latest board schematics. Look under the download link at the top of the
page.
Page 1
Block diagram and revision history.
Page 2
There are two main clock inputs to the EP9302 device. One is the 14.7456 MHz crystal oscillator and the
other is the 32.768 kHz real time clock (RTC).
The 14.7456 MHz clock can be generated from a crystal circuit as shown in the schematics, or optionally
from a 14.7456 MHz oscillator. If a 14.7456 MHz oscillator is used, then only the XTALI pin is driven and
the drive level of the clock must be 3.3 V.
The RTC clock may be generated by the circuit shown in the schematics, or optionally an RTC oscillator.
Due to the cost of RTC oscillators, the circuit shown in the schematics is used. An external oscillator is
made by using an unbuffered '04 inverter. It is very important to use an unbuffered inverter in this
application. Using a buffered inverter may make the circuit oscillate in the ~MHz range or not start at all.
Refer to application note AN265.
The two LEDs connected to the EP9302 device are used to indicate processor health during boot and
general status of the board.
The reset output, RSTON (active-low signal) is buffered by U25. There is a resistor option for the RSTON
signal to be either driven by this buffer or bypassed. If the reset signal is not going to be buffered, U25
must be removed and R117 installed. By default, RSTON is buffered.
Page 3
This block shows the peripheral connections from the EP9302 processor. This page also shows the ADC
connector, JP7.
Page 4
Main items on this page are the USB 2.0 Full-speed Host, USB power, UART, and Commercial IR (CIR)
circuits.
The USB Host circuits are connected directly from the EP9302 to U3 and U4 and then on to the stacked
USB connector, J1. U3 and U4 provide termination for the USB signals and ESD protection. Power for
the USB Host ports comes from the +5V switching regulator and is protected with poly fuses rated for 0.5
A each.
The board has both UARTs brought out. The main UART interface, UART0, is connected to a standard
male DB9 connector and provides for full modem control. The other UART interface is connected to a
5x2 header. There is an option for installing a zero-ohm resistor if the developer needs to provide +5V
power to an external device. The pinout of the headers matches common IDC10-to-DB9 cables. One
such cable is included with the kit. All UART signals are level shifted from TTL to RS-232.
The CIR uses an enhanced GPIO (EGPIO) line to communicate to the EP9302 device.