Switching characteristics – Cypress CY62136VN User Manual

Page 5

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CY62136VN MoBL

®

Document #: 001-06510 Rev. *A

Page 5 of 12

Switching Characteristics

Over the Operating Range

[9]

Parameter

Description

55 ns

70 ns

Unit

Min.

Max.

Min.

Max.

Read Cycle

t

RC

Read Cycle Time

55

70

ns

t

AA

Address to Data Valid

55

70

ns

t

OHA

Data Hold from Address Change

10

10

ns

t

ACE

CE LOW to Data Valid

55

70

ns

t

DOE

OE LOW to Data Valid

25

35

ns

t

LZOE

OE LOW to Low-Z

[10]

5

5

ns

t

HZOE

OE HIGH to High-Z

[10, 11]

25

25

ns

t

LZCE

CE LOW to Low-Z

[10]

10

10

ns

t

HZCE

CE HIGH to High-Z

[10, 11]

25

25

ns

t

PU

CE LOW to Power-up

0

0

ns

t

PD

CE HIGH to Power-down

55

70

ns

t

DBE

BLE / BHE LOW to Data Valid

25

35

ns

t

LZBE

BLE / BHE LOW to Low-Z

[10, 11]

5

5

ns

t

HZBE

BLE / BHE HIGH to High-Z

[12]

25

25

ns

Write Cycle

[12, 13]

t

WC

Write Cycle Time

55

70

ns

t

SCE

CE LOW to Write End

45

60

ns

t

AW

Address Set-up to Write End

45

60

ns

t

HA

Address Hold from Write End

0

0

ns

t

SA

Address Set-up to Write Start

0

0

ns

t

PWE

WE Pulse Width

40

50

ns

t

BW

BLE / BHE LOW to Write End

50

60

ns

t

SD

Data Set-up to Write End

25

30

ns

t

HD

Data Hold from Write End

0

0

ns

t

HZWE

WE LOW to High-Z

[10, 11]

20

25

ns

t

LZWE

WE HIGH to Low-Z

[10]

5

10

ns

Notes:

9. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to V

CC

typ., and output loading of the specified

I

OL

/I

OH

and 30-pF load capacitance.

10. At any given temperature and voltage condition, t

HZCE

is less than t

LZCE

, t

HZOE

is less than t

LZOE

, and t

HZWE

is less than t

LZWE

for any given device.

11. t

HZOE

, t

HZCE

, and t

HZWE

are specified with C

L

= 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.

12. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can

terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.

13. The minimum write cycle time for write cycle 3 (WE controlled, OE LOW) is the sum of t

HZWE

and t

SD

.

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