Panasonic KX-P1150 User Manual
Page 26
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KX-P1150
(5) Gate Array Pin Function
The pin functions are as follows.
GATE ARRAY
CPU
MEMORY
CPU
CPU
IC202^
IC203^
IC204^
LF Motor Enable
LF Motor Phase
lOCSi
A19
A15
A7
AO J
AD7n
Address
Address
H9
ADO
Address/Data
RESET
ALE
CLK
RD
WR
CRTRG
HTRG
ROM1
RAM1
RAM2
LFEN
LFA
LFNA
LFB
LFNB
HTD
INTO
INT2
HSO
HS7
STB
ACK
BUSY
PE
ERROR
SELECT
AFXT
PRIME
CRA
CRNA
CRB
CRNB
CRCNTO
CRCNT1
CRCNT2
Head Pin Data (Sink Tr)
-► Head Pin Data
(Common Tr)
Carriage
Counter,
PRIME
-►STB
Interrupt
output
to CPU
Parallel Data
— Strobe
-► Acknowledge
Busy
-► Paper End
-► Error
-*■ Select
— Auto Feed XT
— Prime
CR Motor Phase
CR Motor
Power
Control
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