Maxim Integrated 78Q8430 Software Driver - Manual (Page 39)

UG_8430_004 78Q8430 Software Driver Development Guidelines
Rev. 1.0 39
7 PHY Procedures
This section describes the following procedures related to PHY operation:
• PHY Register read and write access
• PHY power down
• Auto-negotiation
• Setting PHY speed
• Setting PHY duplex mode
• Setting PHY MDI/MDIX mode
• Response to PHY link status change
7.1 PHY Register Write Access
Use the following procedure to write a value to a PHY register:
STEP 1: Write the value for the PHY register to the MDDAR SMI Data field.
STEP 2: Write to MDCAR.
Fill the MDCAR PHY Reg field with the number of the PHY register to write. Set the MDCAR PHY
Addr field to 0x01. Set the MDCAR RegWr bit and the Busy bit.
STEP 3: Read MDCAR.
STEP 4: Repeat STEP 3 until the MDCAR Busy bit is clear.
7.2 PHY Register Read Access
The following procedure is used to read a value from a PHY register:
STEP 1: Write to MDCAR.
Fill the MDCAR PHY Reg field with the number of the PHY register to read. Set the MDCAR PHY
Addr field to 0x01. Clear the MDCAR RegWr bit and set the Busy bit.
STEP 2: Read MDCAR.
STEP 3: Repeat STEP 3 until the MDCAR Busy bit is clear.
STEP 4: Read the PHY register value from the MDDAR SMI Data field.
7.3 PHY Power Down
In an effort to save power the host may wish to power down the PHY. Use the following procedure to
enable or disable the PHY power down mode:
STEP 1: Use procedure 7.2 to read the value of the MR0 register.
STEP 2: Modify the value of the MR0 Power-down bit.
For low power mode the Power-down bit should be set. For normal mode this bit should be clear.
STEP 3: Use procedure
7.1 to write the modified value back to the MR0 register.
7.4 Auto-negotiation
The 78Q8430 supports the auto-negotiation functions of IEEE 802.3 Clause 28 for 10/100 Mbps
operation over copper wiring. The auto-negotiation function defaults to ON (the MR0 Auto-negotiation
Enable bit is high after reset). Table 7 lists the default values for the auto-negotiation registers.