ADLINK cPCI-7300 - Manual (Page 32)

24 • Registers
DI_ACK_NEQ (R/W)
0: DI_ACK is rising edge active
1: DI_ACK is falling edge active
DI_TRG_NEQ (R/W)
0: DI_TRG is rising edge active
1: DI_TRG is falling edge active
DO_REQ_NEQ (R/W)
0: DO_REQ is rising edge active
1: DO_REQ is falling edge active
DO_ACK_NEQ (R/W)
0: DO_ACK is rising edge active
1: DO_ACK is falling edge active
DO_TRG_NEQ (R/W)
0: DO_TRG is rising edge active
1: DO_TRG is falling edge active
3.10 PLX PCI-9080 DMA Control Registers
The registers of bus-mastering DMA as well as the control and status registers
of PCI-bus interrupts are built in the PLX PCI-9080 ASIC. Users can refer to
the manual of PLX PCI-9080 for detailed information.