ADLINK PCIe-7350 User Manual
Pcie-7350, Advance technologies; automate the world
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Table of contents
Document Outline
- List of Tables
- List of Figures
- 1 Introduction
- 2 Hardware Information
- 3 Function Block and Operation Theory
- 3.1 Block Diagram
- 3.2 Programmable Logic Level
- 3.3 Digital I/O Configuration
- 3.4 Phase Shift of Sample Clock
- 3.5 Bus-mastering DMA Data Transfer
- 3.6 Sample Clock
- 3.7 Operation Mode
- 3.8 Trigger Source and Trigger Mode
- 3.9 Application Function I/O
- 3.10 Pattern Match
- 3.11 COS (Change of State) Event
- 3.12 Termination