ADLINK PCIe-7350 - Manual (Page 30)

20 Function Block and Operation Theory
3.1 Block Diagram
There are 32-channel bi-direction high-speed digital I/O lines, 8-
channel AFI (Application Function I/O) lines, and two sample clock
input/output channels available on the PCIe-7350 card. All the 32-
channel high-speed digital I/O lines are connected to level shifter,
Fairchild FXL4245 and can be programmed as 1.8 V, 2.5 V, or 3.3
V (5 V compatible) logic levels. These channels can be also pro-
grammed as input channels for digital pattern acquisition or output
channels for digital pattern generation.
The 8-channel application function I/O lines are connected to level
shifter, Fairchild FXL2T245, too. These application function I/O
can be programmed as I2C or SPI serial interface, handshaking
interface, external digital trigger input, event output and external
clock input/output with 1.8 V or 2.5 V or 3.3 V (5 compatible) logic
levels by direction and logic level control of level shifter and by AFI
controller implemented in FPGA.
The digital pattern acquisition/generation and corresponding flexi-
ble sample timing are controlled by ADLINK Smart Control Engine
implemented by FPGA. Please refer to Figure 3-1 PCIe-7350
block diagram.
Figure 3-1: PCIe-7350 Block Diagram