ADLINK PCIe-7350 - Manual (Page 7)

List of Tables iii
List of Tables
Table 2-1: Connector CN1 Pin Assignment ............................. 13
Table 2-2: I/O Signal Descriptions ........................................... 14
Table 2-3: SMB Jack Connector Signal Descriptions .............. 14
Table 2-4: LED indicator .......................................................... 15
Table 3-1: PCIe-7350 Logic Levels ......................................... 21
Table 3-2: PCIe-7350 High-Speed Digital I/O Configuration ... 22
Table 3-3: Phase Shift Configuration of PCIe-7350 ................. 28
Table 3-4: DI/DO Sample Clock Configuration
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of the PCIe-7350 .................................................... 34
Table 3-5: PCIe-7350 AFI I/O Configuration ............................ 56
Table 3-6: PCIe-7350 AFI Signal Description .......................... 57
Table 3-7: Logic States of Pattern Match ................................ 69
Table A-1: DIN-68H Pin Assignment ........................................ 73
Table A-2: Pad Position of User-Defined Resistor Termination 75