Echelon FTXL - Manual (Page 27)

FTXL User’s Guide 15
Task Additional Considerations Reference
Select an FPGA device
and load it with Nios II
processor and related
hardware
The FTXL application runs on a Nios II
embedded processor, which is implemented
on an FPGA device. You must meet the
FTXL hardware and software requirements
to ensure that the FTXL device has
sufficient RAM and non-volatile memory.
The FTXL
Hardware Guide
Integrate the FTXL
application with your
device hardware
You integrate the FTXL Transceiver with
the device hardware. You can reuse many
parts of a hardware design for different
applications to create different FTXL
devices.
The FTXL
Hardware Guide
Chapter 6,
Working with the
Nios II
Development
Environment , on
page 101
Test and verify your
hardware design You must ensure that the host processor
and the FTXL Transceiver can
communicate using the parallel interface.
The FTXL Developer’s Kit includes a Bring-
Up application to help test and verify the
communications interface.
The FTXL
Hardware Guide
Select and define the
functional profiles and
resource types for your
device using tools such as
the NodeBuilder
Resource Editor and the
SNVT and SCPT Master
List
You must select profiles and types for use in
the device’s interoperable interface for each
application that you plan to implement.
This selection can include the definition of
user-defined types for network variables,
configuration properties or functional
profiles. A large set of standard definitions
is also available and is sufficient for many
applications.
Chapter 3,
Creating a Model
File , on page 23
Structure the layout and
interoperable interface of
your FTXL device by
creating a model file
You must define the interoperable interface
for your device in a model file, using the
Neuron C (Version 2.1) language, for every
application that you implement. You can
write this code by hand, derive it from an
existing Neuron C or ShortStack
application, or use the NodeBuilder Code
Wizard included with the NodeBuilder
Development Tool to create the required
code using a graphical user interface.
Chapter 3,
Creating a Model
File , on page 23
Appendix C,
Neuron C Syntax
for the Model File ,
on page 125