Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP - Manual (Page 22)

2–8 Chapter 2: Getting Started
Generated Files
External Memory Interface Handbook Volume 3 June 2011 Altera Corporation
Section I. DDR and DDR2 SDRAM Controllers with ALTMEMPHY IP User Guide
Generated Files
Table 2–3 shows the ALTMEMPHY generated files.
Table 2–3. ALTMEMPHY Generated Files (Part 1 of 2)
File Name Description
alt_mem_phy_defines.v
Contains constants used in the interface. This file is
always in Verilog HDL regardless of the language you
chose in the MegaWizard Plug-In Manager.
<variation_name>.ppf Pin planner file for your ALTMEMPHY variation.
<variation_name>.qip
Quartus II IP file for your ALTMEMPHY variation,
containing the files associated with this megafunction.
<variation_name>.v/.vhd
Top-level file of your ALTMEMPHY variation, generated
based on the language you chose in the MegaWizard
Plug-In Manager.
<variation_name>.vho Contains functional simulation model for VHDL only.
<variation_name>_alt_mem_phy_seq_wrapper.vo/.vho
A wrapper file, for simulation only, that calls the
sequencer file, created based on the language you
chose in the MegaWizard Plug-In Manager.
<variation_name>.html
Lists the top-level files created and ports used in the
megafunction.
<variation_name>_alt_mem_phy_seq_wrapper.v/.vhd
A wrapper file, for compilation only, that calls the
sequencer file, created based on the language you
chose in the MegaWizard Plug-In Manager.
<variation_name>_alt_mem_phy_seq.vhd
Contains the sequencer used during calibration. This
file is always in VHDL language regardless of the
language you chose in the MegaWizard Plug-In
Manager.
<variation_name>_alt_mem_phy.v
Contains all modules of the ALTMEMPHY variation
except for the sequencer. This file is always in Verilog
HDL language regardless of the language you chose in
the MegaWizard Plug-In Manager. The DDR3 SDRAM
sequencer is included in the
<variation_name>_alt_mem_phy_seq.vhd file.
<variation name>_alt_mem_phy_pll_<device>.ppf
This XML file describes the MegaCore pin attributes to
the Quartus II Pin Planner.
<variation_name>_alt_mem_phy_pll.v/.vhd
The PLL megafunction file for your ALTMEMPHY
variation, generated based on the language you chose
in the MegaWizard Plug-In Manager.
<variation_name>_alt_mem_phy_delay.vhd
Includes a delay module for simulation. This file is only
generated if you choose VHDL as the language of your
MegaWizard Plug-In Manager output files.
<variation_name>_alt_mem_phy_dq_dqs.vhd or .v
Generated file that contains DQ/DQS I/O atoms
interconnects and instance. Arria II GX devices only.
<variation_name>_alt_mem_phy_dq_dqs_clearbox.txt
Specification file that generates the
<variation_name>_alt_mem_phy_dq_dqs file using
the clearbox flow. Arria II GX devices only.