Using the nios ii c2h compiler, Hardware acceleration using nios ii c2h compiler, Features – Altera Embedded Systems Development Kit, Cyclone III Edition User Manual
Page 59: Examples, Where to find, Chapter 9. using the nios ii c2h compiler
Altera Corporation
Development Board Version 1.0.
9–1
July 2010
Preliminary
Altera Embedded Systems Development Kit, Cyclone III Edition
9. Using the Nios II C2H
Compiler
Hardware
Acceleration
using Nios II
C2H Compiler
Nios
®
II embedded processor C-to-Hardware (C2H) acceleration
compiler is a tool that boosts the performance of your time-critical ANSI
C functions by converting them into hardware accelerators in the FPGA.
Features
■
Push-button acceleration of ANSI/ISO C code
■
GHz performance with m power consumption
■
Tight integration with software design flow
■
Efficient latency-aware scheduling and pipelining of memory
transactions
■
Direct connection of hardware accelerators to CPU's memory map
■
Seamless support for pointers and arrays
This tool is provided as a evaluation option with the Nios II Embedded
Design Suite (EDS). Altera Mandelbrot C2H is a ready-to-run demo that
showcases the benefits of hardware acceleration using the Nios II C2H
Compiler.
Examples
The following system design has been provided for demonstration
purposes:
■
Altera Mandelbrot C2H
Where to find
■
You can locate it in the
altera
\<version>\kits\cycloneIII_3C120_embedded \ in demos
directory.
■
You can also find the complete Quartus II project for this design on