Developing usb and sd card based systems, Usb host and device controller ip core, Usb reference design – Altera Embedded Systems Development Kit, Cyclone III Edition User Manual

Page 67: Sd host controller ip core

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Altera Corporation

Development Board Version 1.0.

10–1

July 2010

Preliminary

Altera Embedded Systems Development Kit, Cyclone III Edition

10. Developing USB and SD

Card based Systems

The LCD Multimedia HSMC provides SD Card peripheral so you can add
SD Card interface to your system. The H2SUM provides a USB PHY so
you can add USB capability to your Embedded System by adding USB 2.0
PHY IP core. In this section, details regarding the development of SD
Card interface and USB interface are presented.

USB Host and Device Controller IP Core

SLS provides USB 2.0 Host and device IP core, ready to use for all Nios II
based applications.

Features

Certified USB 2.0 device core

Supports both High Speed (480 Mbps) and full Speed (12Mbps)

Supported PHY Interfaces

UTMI (Cypress CY7C68000 PHY)

ULPI (Phillips ISP 1504 PHY)

USB Reference Design

SLS provides a reference design for USB development targeted for the
Altera Embedded Systems Development Kit, Cyclone III edition. For
more information, refer to the

Altera Embedded Systems Development

Kit, Cyclone III Edition

page.

SD Host Controller IP Core

The SD Host Controller IP Core included in the LCD processor design
example as well as the Application Selector design example uses a third
party vendor, SLS’s 4-Pin SD Card Controller IP Core. This core support
both 1-bit and 4-bit SD mode. The core provided by SLS is an encrypted
SOPC Builder ready IP available for purchase.

Features of SLS SD Host Controller IP Core

Supports both SD 1-bit and 4-bit mode for data communication.

Variable SD Clock frequency selection using software.

Internal FIFO for data transmit/receive operation.

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